Intel Arrow Lake & Lunar Lake I/O Configurations Revealed Along With LGA 1851 Socket Pinout Plan
Intel’s next-gen Arrow Lake & Lunar Lake CPUs will offer a diverse set of IO configurations which have been revealed by @jaykihn0.
Intel’s Arrow Lake & Lunar Lake “Core Ultra 200” CPUs To Feature Gen5 Support Across All PC Platforms
Intel is working on a diverse range of CPU platforms, ranging from high-end desktops to thin & light designs. These platforms will feature the upcoming Core Ultra 200 “Arrow Lake” & Core Ultra 200V “Lunar Lake” CPU families. We have already done a deep-dive of the Lunar Lake architecture & also covered Arrow Lake quite extensively in the past and now we have some more info when it comes to the IO capabilities of each respective chip platform.
Starting with the top Intel Arrow Lake-S Desktop CPUs, the SOC Tile will feature 16 PCIe Gen5 lanes dedicated to discrete graphics, the IOE Tile will feature 4 Gen5 lanes and 4 Gen4 lanes dedicated to M.2 SSDs while the PCH (800-series) will offer up to 14 Gen4 lanes, 7 Gen4 for SATA and 2 Gen4 for dual GbE LAN connections. There will also be 13 USB2 and 10 USB3 lanes. The Arrow Lake-HX CPUs will be similar to the desktop offerings since they are based on a similar die. The only difference is one extra USB2 lane.
Moving down the stack, we have the Intel Arrow Lake-H CPUs which will feature 12 Gen4 lanes on the SOC tile, 8 Gen5 lanes for discrete graphics, 8 Gen4 lanes for M.2 (x4/x4) on the IOE tile, & with a combination of 10 USB2 plus 2 USB3 lanes on the PCH tile. The lower-end Arrow Lake-U chips are not mentioned but we can expect IO similar or slightly cut-down as the Arrow Lake-H SKUs.
Lastly, we have Intel’s Lunar Lake CPUs which will feature all IO capabilities on the SOC tile. It will offer UFS (1×2), Gen4 (GBE x1), Gen4 (x3), Gen5 (x4), USB 3.2 Gen2x1 (x2), USB3 (x2) and USB2 (x6) lanes.
Intel Lunar Lake & Arrow Lake CPU Configurations:
| Tile | Arrow Lake-S | Arrow Lake-HX | Arrow Lake-S | Lunar Lake |
|---|---|---|---|---|
| SOC | PCIe Gen5 x16 | PCIe Gen5 x16 | PCIe Gen4 x12 | UFS 1×2 PCIe gen4 / GBE x1 PCIe Gen4 x3 PCIe Gen5 x4 USB 3.2 Gen2x1 x2 USB2 x6 USB3 x2 |
| IOE | PCIe Gen5 x4 PCIe Gen4 x4 |
PCIe Gen5 x4 PCIe Gen4 x4 |
PCIe Gen5 x8 PCIe Gen4 x8 (x4/x4) |
N/A |
| PCH | PCIe Gen4 x14 PCIe Gen4 / SATA x7 PCIe Gen4 / GBE x2 PCIe Gen4 / SATA / GBE x1 USB2 x13 USB3 x10 |
PCIe Gen4 x14 PCIe Gen4 / SATA x7 PCIe Gen4 / GBE x2 PCIe Gen4 / SATA / GBE x1 USB2 x14 USB3 x10 |
USB2 x10 USB3 x2 |
N/A |
In addition to the IO configurations, Jaykihn has also shared the pinout plan for the Intel LGA 1851 socket which is designed for Arrow Lake-S Desktop CPUs. The LGA 1851 layout is very different vs the existing LGA 1700/1800 socket and that is obvious from the floorplan of both sockets. The new socket comes with 51 additional pins in the LGA format.
Intel LGA 1851 Socket Pinout Plan (Image Source: @Jaykihn):
Intel LGA 1700 Socket Pinout Plan (Image Source: @Igor’s Lab):
There are some other details also listed by the user which can be seen in the post below:
Some Arrow Lake ARL-S details:
sapll 3.2GHz, can be lowered to 1.6GHz.
Core pll can have a voltage offset.
soc d2d is 1.5GHz to 4GHz set range.
GT slice and GT unslice may or may not share VR, depends on the motherboard.— Jaykihn (@jaykihn0) July 1, 2024
Intel’s Lunar Lake CPUs will be the first Core Ultra 200 product to hit retail with an expected launch in September followed by the Arrow Lake-S Desktop CPUs for high-performance PCs in October. All remaining Core Ultra 200 CPUs will be launching in early 2025 following CES. Expect more details at Intel’s Innovation event in September.
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